C9302Hardware interacts directly with the Cirrus EP9302 hardware peripherals. More...
#include <9302hw.h>
Public Member Functions | |
SINGLETON (C9302Hardware) | |
This internal macro handles instantiation of this class. | |
unsigned short | GetAD (unsigned int channel) |
Get the raw A/D value given the channel. | |
void | SetGreenLED (bool state) |
Set the state of the green LED on the CPU board. | |
void | SetRedLED (bool state) |
Set the state of the red LED on the CPU board. | |
volatile unsigned int * | PortAData () |
Set/get Port A data register on EP9302. | |
volatile unsigned int * | PortADataDR () |
Set/get Port A data direction register on EP9302. | |
volatile unsigned int * | PortBData () |
Set/get Port B data register on EP9302. | |
volatile unsigned int * | PortBDataDR () |
Set/get Port B data direction register on EP9302. | |
volatile unsigned int * | PortCData () |
Set/get Port C data register on EP9302. | |
volatile unsigned int * | PortCDataDR () |
Set/get Port C data direction register on EP9302. | |
volatile unsigned int * | PortEData () |
Set/get Port E data register on EP9302. | |
volatile unsigned int * | PortEDataDR () |
Set/get Port E data direction register on EP9302. | |
volatile unsigned int * | PortFData () |
Set/get Port F data register on EP9302. | |
volatile unsigned int * | PortFDataDR () |
Set/get Port F data direction register on EP9302. | |
volatile unsigned int * | PortGData () |
Set/get Port G data register on EP9302. | |
volatile unsigned int * | PortGDataDR () |
Set/get Port G data direction register on EP9302. | |
volatile unsigned int * | PortHData () |
Set/get Port H data register on EP9302. | |
volatile unsigned int * | PortHDataDR () |
Set/get Port A data register. | |
unsigned short | GetBitstreamVersion () |
Get the FPGA bitstream version. | |
unsigned char | GetBitstreamMinorVersion () |
Get the FPGA bitstream minor version. | |
unsigned char | GetBitstreamMajorVersion () |
Get the FPGA bitstream major version. | |
Public Attributes | |
CMemMap | m_scr |
memory mapped region of memory controller on EP9302 | |
CMemMap | m_gpio |
memory mapped region of general purpose I/O controller on EP9302 | |
CMemMap | m_syscon |
memory mapped region of system controller on EP9302 | |
CMemMap | m_fpga |
memory mapped region of FPGA on EP9302 | |
CMemMap | m_adc |
memory mapped region of analog-to-digital controller on EP9302 | |
CMemMap | m_uart1 |
memory mapped region of UART1 (serial controller) on EP9302 | |
CMemMap | m_uart2 |
memory mapped region UART2 (serial controller) on EP9302 |
C9302Hardware interacts directly with the Cirrus EP9302 hardware peripherals.
This class is normally only used by other I/O classes. You shouldn't need to use this class if you wish to interact with sensors, actuators, lcd and/or keypad. To instantiate this class:
// by pointer C9302Hardware *phw = C9302Hardware::GetPtr(); // or by reference C9302Hardware &hw = C9302Hardware::GetRef();
And when done with this class, call Release(), for each call to GetPtr() or GetRef():
unsigned short C9302Hardware::GetAD | ( | unsigned int | channel | ) |
Get the raw A/D value given the channel.
channel | value between 0 and 4 |
unsigned char C9302Hardware::GetBitstreamMajorVersion | ( | ) |
Get the FPGA bitstream major version.
unsigned char C9302Hardware::GetBitstreamMinorVersion | ( | ) |
Get the FPGA bitstream minor version.
unsigned short C9302Hardware::GetBitstreamVersion | ( | ) |
Get the FPGA bitstream version.
volatile unsigned int* C9302Hardware::PortAData | ( | ) | [inline] |
Set/get Port A data register on EP9302.
volatile unsigned int* C9302Hardware::PortADataDR | ( | ) | [inline] |
Set/get Port A data direction register on EP9302.
volatile unsigned int* C9302Hardware::PortBData | ( | ) | [inline] |
Set/get Port B data register on EP9302.
volatile unsigned int* C9302Hardware::PortBDataDR | ( | ) | [inline] |
Set/get Port B data direction register on EP9302.
volatile unsigned int* C9302Hardware::PortCData | ( | ) | [inline] |
Set/get Port C data register on EP9302.
volatile unsigned int* C9302Hardware::PortCDataDR | ( | ) | [inline] |
Set/get Port C data direction register on EP9302.
volatile unsigned int* C9302Hardware::PortEData | ( | ) | [inline] |
Set/get Port E data register on EP9302.
volatile unsigned int* C9302Hardware::PortEDataDR | ( | ) | [inline] |
Set/get Port E data direction register on EP9302.
volatile unsigned int* C9302Hardware::PortFData | ( | ) | [inline] |
Set/get Port F data register on EP9302.
volatile unsigned int* C9302Hardware::PortFDataDR | ( | ) | [inline] |
Set/get Port F data direction register on EP9302.
volatile unsigned int* C9302Hardware::PortGData | ( | ) | [inline] |
Set/get Port G data register on EP9302.
volatile unsigned int* C9302Hardware::PortGDataDR | ( | ) | [inline] |
Set/get Port G data direction register on EP9302.
volatile unsigned int* C9302Hardware::PortHData | ( | ) | [inline] |
Set/get Port H data register on EP9302.
volatile unsigned int* C9302Hardware::PortHDataDR | ( | ) | [inline] |
Set/get Port A data register.
void C9302Hardware::SetGreenLED | ( | bool | state | ) | [inline] |
Set the state of the green LED on the CPU board.
state | true=on, false=off |
void C9302Hardware::SetRedLED | ( | bool | state | ) | [inline] |
Set the state of the red LED on the CPU board.
state | true=on, false=off |
C9302Hardware::SINGLETON | ( | C9302Hardware | ) |
This internal macro handles instantiation of this class.
memory mapped region of analog-to-digital controller on EP9302
memory mapped region of FPGA on EP9302
memory mapped region of general purpose I/O controller on EP9302
memory mapped region of memory controller on EP9302
memory mapped region of system controller on EP9302
memory mapped region of UART1 (serial controller) on EP9302
memory mapped region UART2 (serial controller) on EP9302